IBM Pushes the Limits of Silicon Technology in Nine Key Areas of Innovation
Following the news that IBM has invested $3 billion into two research programmes to meet emerging demands of cloud computing and big data systems, the company has highlighted nine key areas in which the stage development initiative will be targeted towards.
The idea is to push the limits of chip technology to ‘7 nanometres and below’ and to create a post-silicon future for manufacturers, epitomised by the following key areas of development currently being undertaken by IBM:
7 nanometer technology and beyond
IBM Researchers predict scaling down to 7 nanometres and perhaps below, by the end of the decade, will require significant investment and innovation in semiconductor architectures as well as invention of new tools and techniques for manufacturing.
"The question is not if we will introduce 7 nanometre technology into manufacturing, but rather how, when, and at what cost?" said John Kelly, senior vice president, IBM Research. "IBM engineers and scientists, along with our partners, are well suited for this challenge and are already working on the materials science and device engineering required to meet the demands of the emerging system requirements for cloud, big data, and cognitive systems.
“This new investment will ensure that we produce the necessary innovations to meet these challenges."
Bridge to a “Post-Silicon” Era
Silicon transistors, tiny switches that carry information on a chip, have been made smaller year after year, but they are approaching a point of physical limitation.
Within a few more generations, classical scaling and shrinkage will no longer yield the sizable benefits of lower power, lower cost and higher speed processors that the industry has become accustomed to.
There is an urgent need for new materials and circuit architecture designs compatible with this engineering process as the technology industry nears physical scalability limits of the silicon transistor.
Beyond 7 nanometres, the challenges dramatically increase, requiring a new kind of material to power systems of the future, and new computing platforms to solve problems that are unsolvable or difficult to solve today.
Potential alternatives include new materials such as carbon nanotubes, and non-traditional computational approaches such as neuromorphic computing, cognitive computing, machine learning techniques, and the science behind quantum computing.
IBM holds over 500 patents for technologies that will drive advancements at 7 nanometres and beyond silicon. These continued investments will accelerate the invention and introduction into product development for IBM's highly differentiated computing systems for cloud, and big data analytics.
IBM is a world leader in superconducting qubit-based quantum computing science, which enables computers to filter through millions of pieces of information at once, and is a pioneer in the field of experimental and theoretical quantum information, fields that are still in the category of fundamental science.
The research team recently demonstrated the first experimental realisation of parity check with three superconducting qubits, an essential building block for one type of quantum computer.
Bringing together nanoscience, neuroscience, and supercomputing, IBM and university partners have developed an end-to-end ecosystem including a non-von Neumann architecture, a new programming language, as well as applications.
This novel technology allows for computing systems that emulate the brain's computing efficiency, size and power usage with the goal to build a neurosynaptic system with ten billion neurons and a hundred trillion synapses, all while consuming only one kilowatt of power and occupying less than two litres of volume.
CMOS integrated silicon photonics is a technology that integrates functions for optical communications on a silicon chip, and the IBM team has recently designed and fabricated the world's first monolithic silicon photonics based transceiver with wavelength division multiplexing, which uses light to transmit data between different computer components at high data rates, low costs and with optimum efficiency.
Silicon nanophotonics technology provides answers to Big Data challenges by seamlessly connecting various parts of large systems, and moving terabytes of data via pulses of light through optical fibers.
IBM researchers have demonstrated the world’s highest transconductance on a self-aligned III-V channel metal-oxide semiconductor (MOS) field-effect transistors (FETs) device structure that is compatible with CMOS scaling.
These materials and structural innovation are expected to pave path for technology scaling at 7 nanometres and beyond. With more than an order of magnitude higher electron mobility than silicon, integrating III-V materials into CMOS enables higher performance at lower power density, allowing for an extension to power/performance scaling to meet the demands of cloud computing and big data systems.
IBM also has demonstrated the capability for purifying carbon nanotubes to 99.99 percent, the highest (verified) purities demonstrated to date, and transistors at 10 nm channel length that show no degradation due to scaling, currently unmatched by any other material system to date.
Carbon nanotubes are single atomic sheets of carbon rolled up into a tube. The carbon nanotubes form the core of a transistor device that will work in a fashion similar to the current silicon transistor, but will be better performing. They could be used to replace the transistors in chips that power data-crunching servers, high performing computers and ultra-fast smartphones.
Graphene is an excellent conductor of heat and electricity, and it is also remarkably strong and flexible and its characteristics offer the possibility to build faster switching transistors than are possible with conventional semiconductors, particularly for applications in the handheld wireless communications business where it will be a more efficient switch than those currently used.
In 2013, IBM demonstrated the world's first graphene based integrated circuit receiver front end for wireless communications. The circuit consisted of a 2-stage amplifier and a down converter operating at 4.3 GHz.
Next Generation Low Power Transistors
In addition to new materials like CNTs, new architectures and innovative device concepts are required to boost future system performance. Power dissipation is a fundamental challenge for nanoelectronic circuits with today’s transistor still losing energy in its ‘off’ state.
A potential alternative to today’s power hungry silicon field effect transistors are so-called steep slope devices, operating at much lower voltage and thus dissipating significantly less power.
IBM scientists are researching tunnel field effect transistors (TFETs) to potentially achieve a 100-fold power reduction over complementary CMOS transistors, so integrating TFETs with CMOS technology could improve low-power integrated circuits.
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